The present invention relates generally to memory expandable systems and more particularly, to a serial network architecture for controlling and configuring add-on memory modules.
It is well-known in the prior art to provide modular systems, such as computer peripherals, mini-computers and desktop personal computers, having expandable and flexible memory systems comprised of a plurality of memory modules. Typically, such modules are of the plug-in type in the form of printed circuit boards which have various electronic components mounted upon them, including integrated circuit chips which are also of the plug-in type. The typical design of a modern computer or microprocessor driven device includes a main printed circuit board with one or more female connectors, known as a mother board, to which one or more accessory or option boards including memory modules can be inter-connected. Generally the design features the mother board in a horizontal orientation at the bottom of a computer case with the plug-in memory modules or other accessory printed circuit boards or cards held in vertical slots in the computer case perpendicular to the mother board, and inter-connected to it by means of a mating pair of male and female parallel edge connectors, one of which is attached to the surface of the mother board and the other to the edge of the memory or accessory card.
Typically, a memory module consists of a plug-in printed circuit board which carries an addressable memory unit, memory address and control logic units and local interface units which provides interfacing between the module and the host device. The addressable memory unit will be comprised of one or more blocks or banks of memory cells having a standardized size such as 256 k-bytes. A standardized memory module printed circuit board may have a number of plug in sockets to accept blocks of memory in the form of integrated circuit chips. Thus a standardized plug in printed circuit board may provide memory modules with several different capacities.
In practice, the memory units of the various memory modules are so interconnected as to provide in effect a single addressable memory. The memory unit on each memory module has a starting address and an ending address. The memory modules are interconnected sequentially so that their address ranges are contiguous in order, or sequence, of connection. The starting address of each memory module forming a boundary between that module and any preceding module. Each memory module responds to a range of addresses that includes its starting address and its ending address. Typically, the ending address is determined by adding the memory module capacity to its starting address.
In prior art memory modules, the address range that a particular module will respond to is manually set utilizing toggle or slide switches. If a memory module was replaced with a memory module having a different memory capacity then the switches of all the higher order memory modules must be reset. The requirement for manual setting of address ranges introduces the possibility of human error and is, to say the least, inconvenient.
U.S. Pat. No. RE. 31,318 granted to Kaufman et al on Jul. 19, 1983 discloses a system for automatically setting the address ranges of respective memory modules of a continuous bank of memory modules. A modular minicomputer includes a central processing unit, a number of replaceable memory modules and input and output peripheral devices. Each of the memory modules includes an address range calculator, an address range detector, a local memory unit and memory cell selection logic. The address range calculator of each memory module includes a local memory capacity signal source which provides a signal representative of the capacity of the memory unit of the memory module on which it is mounted. A memory module of one local capacity may be replaced by a memory module of a different local capacity and memory modules of different capacities may be interchanged so long as the total memory capacity remains below the maximum allowable value. Whenever one or more memory modules are installed the ranges of addresses are assigned automatically to the individual modules. A processor module generates a starting address signal for the first installed memory module. The address range for an individual memory module is calculated by adding the local memory unit capacity to the module's starting address to arrive at the module's ending address. The last memory module generates an address signal which represents the upper boundary of the memory system.